STMicroelectronics

Pros: You get a couple of WFH days a week, which helps with the commute for this large corporate. It's a solid perk for some, especially when you need to focus without office distractions. For semiconductor roles, any remote option is usually appreciated.
Cons: The hybrid model isn't super consistent; it really depends on your specific manager and team. Sometimes it feels like there's a push to be in the office more, even when it's not critical for my chip design tasks. Could use more consistent company-wide policies.
Advice to Management: Try to be more consistent with the hybrid work policy across different departments. Trust your employees more for flexible arrangements, especially for roles that don't strictly require lab access every day.

Pros: I liked that it's a very stable place to work in the semiconductor industry. As a Semiconductor Engineer, I found my colleagues in the Carrollton, TX office to be pretty supportive and knowledgeable. There's a decent sense of camaraderie among the teams.
Cons: The company culture can feel a bit old-school sometimes. Decision-making is really slow, which can be frustrating when you're trying to push new projects. It's not the most innovative environment, which is tough for some people.
Advice to Management: Try to empower teams more and speed up the decision-making process. Encourage more risk-taking and modern ways of working, especially for technical roles.

Pros: Job security is really good here in the semiconductor industry. The benefits for employees are pretty solid. My colleagues in the Grenoble office were always helpful and a great bunch to work with.
Cons: The company culture feels very corporate and a bit old-school. Getting new projects or changes approved as a Semiconductor Test Engineer was often slow and frustrating. There's not much room for quick innovation, which can be tough.
Advice to Management: Leaders should really try to encourage more forward-thinking and faster decision-making. We need to cut down on the red tape if we want to keep up in the chip design space.